DynASM/x86: Fix movd/movq and vmovd/vmovq operand sizes.
Thanks to Dmitry Stogov. #1489
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@ -1310,7 +1310,7 @@ local map_op = {
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mfence_0 = "0FAEF0",
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mfence_0 = "0FAEF0",
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movapd_2 = "rmo:660F28rM|mro:660F29Rm",
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movapd_2 = "rmo:660F28rM|mro:660F29Rm",
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movaps_2 = "rmo:0F28rM|mro:0F29Rm",
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movaps_2 = "rmo:0F28rM|mro:0F29Rm",
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movd_2 = "rm/od:660F6ErM|rm/oq:660F6ErXM|mr/do:660F7ERm|mr/qo:",
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movd_2 = "rm/od:660F6ErM|mr/do:660F7ERm",
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movdqa_2 = "rmo:660F6FrM|mro:660F7FRm",
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movdqa_2 = "rmo:660F6FrM|mro:660F7FRm",
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movdqu_2 = "rmo:F30F6FrM|mro:F30F7FRm",
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movdqu_2 = "rmo:F30F6FrM|mro:F30F7FRm",
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movhlps_2 = "rro:0F12rM",
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movhlps_2 = "rro:0F12rM",
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@ -1325,7 +1325,7 @@ local map_op = {
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movnti_2 = "xrqd:0FC3Rm",
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movnti_2 = "xrqd:0FC3Rm",
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movntpd_2 = "xro:660F2BRm",
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movntpd_2 = "xro:660F2BRm",
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movntps_2 = "xro:0F2BRm",
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movntps_2 = "xro:0F2BRm",
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movq_2 = "rro:F30F7ErM|rx/oq:|xr/qo:n660FD6Rm",
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movq_2 = x64 and "rro:F30F7ErM|rx/oq:|xr/qo:n660FD6Rm|rm/oq:660F6ErXM|mr/qo:660F7ERm" or "rro:F30F7ErM|rx/oq:|xr/qo:n660FD6Rm",
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movsd_2 = "rro:F20F10rM|rx/oq:|xr/qo:nF20F11Rm",
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movsd_2 = "rro:F20F10rM|rx/oq:|xr/qo:nF20F11Rm",
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movss_2 = "rro:F30F10rM|rx/od:|xr/do:F30F11Rm",
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movss_2 = "rro:F30F10rM|rx/od:|xr/do:F30F11Rm",
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movupd_2 = "rmo:660F10rM|mro:660F11Rm",
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movupd_2 = "rmo:660F10rM|mro:660F11Rm",
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@ -1529,8 +1529,8 @@ local map_op = {
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vmaskmovpd_3 = "rrxoy:660F38V2DrM|xrroy:660F38V2FRm",
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vmaskmovpd_3 = "rrxoy:660F38V2DrM|xrroy:660F38V2FRm",
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vmovapd_2 = "rmoy:660Fu28rM|mroy:660Fu29Rm",
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vmovapd_2 = "rmoy:660Fu28rM|mroy:660Fu29Rm",
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vmovaps_2 = "rmoy:0Fu28rM|mroy:0Fu29Rm",
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vmovaps_2 = "rmoy:0Fu28rM|mroy:0Fu29Rm",
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vmovd_2 = "rm/od:660Fu6ErM|rm/oq:660FuX6ErM|mr/do:660Fu7ERm|mr/qo:",
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vmovd_2 = "rm/od:660Fu6ErM|mr/do:660Fu7ERm",
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vmovq_2 = "rro:F30Fu7ErM|rx/oq:|xr/qo:660FuD6Rm",
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vmovq_2 = x64 and "rro:F30Fu7ErM|rx/oq:|xr/qo:660FuD6Rm|rm/oq:660FuX6ErM|mr/qo:660Fu7ERm" or "rro:F30Fu7ErM|rx/oq:|xr/qo:660FuD6Rm",
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vmovddup_2 = "rmy:F20Fu12rM|rro:|rx/oq:",
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vmovddup_2 = "rmy:F20Fu12rM|rro:|rx/oq:",
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vmovhlps_3 = "rrro:0FV12rM",
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vmovhlps_3 = "rrro:0FV12rM",
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vmovhpd_2 = "xr/qo:660Fu17Rm",
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vmovhpd_2 = "xr/qo:660Fu17Rm",
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@ -354,11 +354,11 @@
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|// Synthesize SSE FP constants.
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|// Synthesize SSE FP constants.
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|.macro sseconst_abs, reg, tmp // Synthesize abs mask.
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|.macro sseconst_abs, reg, tmp // Synthesize abs mask.
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| mov64 tmp, U64x(7fffffff,ffffffff); movd reg, tmp
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| mov64 tmp, U64x(7fffffff,ffffffff); movq reg, tmp
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|.endmacro
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|.endmacro
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|.macro sseconst_hi, reg, tmp, val // Synthesize hi-32 bit const.
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|.macro sseconst_hi, reg, tmp, val // Synthesize hi-32 bit const.
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| mov64 tmp, U64x(val,00000000); movd reg, tmp
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| mov64 tmp, U64x(val,00000000); movq reg, tmp
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|.endmacro
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|.endmacro
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|.macro sseconst_sign, reg, tmp // Synthesize sign mask.
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|.macro sseconst_sign, reg, tmp // Synthesize sign mask.
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@ -2087,7 +2087,7 @@ static void build_subroutines(BuildCtx *ctx)
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|.endif
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|.endif
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|1:
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|1:
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| ja ->fff_fallback
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| ja ->fff_fallback
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| movd xmm0, RB
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| movq xmm0, RB
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|.else
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|.else
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| checknumtp [BASE], ->fff_fallback
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| checknumtp [BASE], ->fff_fallback
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| movsd xmm0, qword [BASE]
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| movsd xmm0, qword [BASE]
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@ -2122,7 +2122,7 @@ static void build_subroutines(BuildCtx *ctx)
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| jmp <1
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| jmp <1
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|2:
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|2:
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| ja ->fff_fallback_bit_op
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| ja ->fff_fallback_bit_op
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| movd xmm0, RA
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| movq xmm0, RA
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|.else
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|.else
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| checknumtp [RD], ->fff_fallback_bit_op
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| checknumtp [RD], ->fff_fallback_bit_op
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| movsd xmm0, qword [RD]
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| movsd xmm0, qword [RD]
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@ -2693,7 +2693,7 @@ static void build_subroutines(BuildCtx *ctx)
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| ret
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| ret
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|1:
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|1:
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| mov64 rdx, U64x(c3f00000,00000000) // -0x1p64 (double).
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| mov64 rdx, U64x(c3f00000,00000000) // -0x1p64 (double).
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| movd xmm1, rdx
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| movq xmm1, rdx
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| addsd xmm0, xmm1
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| addsd xmm0, xmm1
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| cvttsd2si rax, xmm0 // Convert [2^63..2^64+2^63) range.
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| cvttsd2si rax, xmm0 // Convert [2^63..2^64+2^63) range.
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| // Note that -0x1p63 converts to -0x8000000000000000LL either way.
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| // Note that -0x1p63 converts to -0x8000000000000000LL either way.
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@ -3005,16 +3005,16 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
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| ja ->vmeta_comp
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| ja ->vmeta_comp
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| // RA is an integer, RD is a number.
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| // RA is an integer, RD is a number.
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| cvtsi2sd xmm1, RAd
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| cvtsi2sd xmm1, RAd
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| movd xmm0, RD
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| movq xmm0, RD
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| jmp >3
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| jmp >3
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|.else
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|.else
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| cmp ITYPEd, LJ_TISNUM; jae ->vmeta_comp
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| cmp ITYPEd, LJ_TISNUM; jae ->vmeta_comp
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| cmp RBd, LJ_TISNUM; jae ->vmeta_comp
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| cmp RBd, LJ_TISNUM; jae ->vmeta_comp
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|.endif
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|.endif
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|1:
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|1:
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| movd xmm0, RD
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| movq xmm0, RD
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|2:
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|2:
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| movd xmm1, RA
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| movq xmm1, RA
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|3:
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|3:
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| add PC, 4
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| add PC, 4
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| ucomisd xmm0, xmm1
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| ucomisd xmm0, xmm1
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@ -3059,7 +3059,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
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|7: // RD is not an integer.
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|7: // RD is not an integer.
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| ja >5
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| ja >5
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| // RD is a number.
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| // RD is a number.
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| movd xmm1, RD
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| movq xmm1, RD
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| cmp ITYPEd, LJ_TISNUM; jb >1; jne >5
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| cmp ITYPEd, LJ_TISNUM; jb >1; jne >5
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| // RD is a number, RA is an integer.
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| // RD is a number, RA is an integer.
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| cvtsi2sd xmm0, RAd
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| cvtsi2sd xmm0, RAd
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@ -3074,10 +3074,10 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
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|.else
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|.else
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| cmp RBd, LJ_TISNUM; jae >5
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| cmp RBd, LJ_TISNUM; jae >5
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| cmp ITYPEd, LJ_TISNUM; jae >5
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| cmp ITYPEd, LJ_TISNUM; jae >5
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| movd xmm1, RD
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| movq xmm1, RD
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|.endif
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|.endif
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|1:
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|1:
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| movd xmm0, RA
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| movq xmm0, RA
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|2:
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|2:
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| ucomisd xmm0, xmm1
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| ucomisd xmm0, xmm1
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|4:
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|4:
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@ -3199,11 +3199,11 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
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|8: // RA is an integer, RD is a number.
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|8: // RA is an integer, RD is a number.
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| cvtsi2sd xmm0, RBd
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| cvtsi2sd xmm0, RBd
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| movd xmm1, RD
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| movq xmm1, RD
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| ucomisd xmm0, xmm1
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| ucomisd xmm0, xmm1
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| jmp >4
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| jmp >4
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|1:
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|1:
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| movd xmm0, RD
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| movq xmm0, RD
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|.else
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|.else
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| checknum RB, >3
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| checknum RB, >3
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|1:
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|1:
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@ -3881,7 +3881,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
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|.else
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|.else
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| // Convert number to int and back and compare.
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| // Convert number to int and back and compare.
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| checknum RC, >5
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| checknum RC, >5
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| movd xmm0, RC
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| movq xmm0, RC
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| cvttsd2si RCd, xmm0
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| cvttsd2si RCd, xmm0
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| cvtsi2sd xmm1, RCd
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| cvtsi2sd xmm1, RCd
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| ucomisd xmm0, xmm1
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| ucomisd xmm0, xmm1
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@ -4007,7 +4007,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
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|.else
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|.else
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| // Convert number to int and back and compare.
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| // Convert number to int and back and compare.
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| checknum RC, >5
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| checknum RC, >5
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| movd xmm0, RC
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| movq xmm0, RC
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| cvttsd2si RCd, xmm0
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| cvttsd2si RCd, xmm0
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| cvtsi2sd xmm1, RCd
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| cvtsi2sd xmm1, RCd
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| ucomisd xmm0, xmm1
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| ucomisd xmm0, xmm1
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@ -444,7 +444,7 @@
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|// Synthesize SSE FP constants.
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|// Synthesize SSE FP constants.
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|.macro sseconst_abs, reg, tmp // Synthesize abs mask.
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|.macro sseconst_abs, reg, tmp // Synthesize abs mask.
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|.if X64
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|.if X64
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| mov64 tmp, U64x(7fffffff,ffffffff); movd reg, tmp
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| mov64 tmp, U64x(7fffffff,ffffffff); movq reg, tmp
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|.else
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|.else
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| pxor reg, reg; pcmpeqd reg, reg; psrlq reg, 1
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| pxor reg, reg; pcmpeqd reg, reg; psrlq reg, 1
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|.endif
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|.endif
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@ -452,7 +452,7 @@
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|.macro sseconst_hi, reg, tmp, val // Synthesize hi-32 bit const.
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|.macro sseconst_hi, reg, tmp, val // Synthesize hi-32 bit const.
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|.if X64
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|.if X64
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| mov64 tmp, U64x(val,00000000); movd reg, tmp
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| mov64 tmp, U64x(val,00000000); movq reg, tmp
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|.else
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|.else
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| mov tmp, 0x .. val; movd reg, tmp; pshufd reg, reg, 0x51
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| mov tmp, 0x .. val; movd reg, tmp; pshufd reg, reg, 0x51
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|.endif
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|.endif
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@ -3156,7 +3156,7 @@ static void build_subroutines(BuildCtx *ctx)
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| ret
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| ret
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|1:
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|1:
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| mov64 rdx, U64x(c3f00000,00000000) // -0x1p64 (double).
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| mov64 rdx, U64x(c3f00000,00000000) // -0x1p64 (double).
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| movd xmm1, rdx
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| movq xmm1, rdx
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| addsd xmm0, xmm1
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| addsd xmm0, xmm1
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| cvttsd2si rax, xmm0 // Convert [2^63..2^64+2^63) range.
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| cvttsd2si rax, xmm0 // Convert [2^63..2^64+2^63) range.
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| // Note that -0x1p63 converts to -0x8000000000000000LL either way.
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| // Note that -0x1p63 converts to -0x8000000000000000LL either way.
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