x64/ARM64/MIPS64: Fix constant bit shift code generation.
Reported by Sergey Kaplun. #1480
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@ -1549,7 +1549,8 @@ static void asm_bitshift(ASMState *as, IRIns *ir, A64Ins ai, A64Shift sh)
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int32_t shmask = irt_is64(ir->t) ? 63 : 31;
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if (irref_isk(ir->op2)) { /* Constant shifts. */
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Reg left, dest = ra_dest(as, ir, RSET_GPR);
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int32_t shift = (IR(ir->op2)->i & shmask);
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IRIns *irr = IR(ir->op2);
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int32_t shift = ((irr->o == IR_KINT ? irr->i : (int32_t)ir_kint64(irr)->u64) & shmask);
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IRIns *irl = IR(ir->op1);
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if (shmask == 63) ai += A64I_UBFMx - A64I_UBFMw;
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@ -2089,7 +2089,8 @@ static void asm_bitshift(ASMState *as, IRIns *ir, MIPSIns mi, MIPSIns mik)
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{
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Reg dest = ra_dest(as, ir, RSET_GPR);
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if (irref_isk(ir->op2)) { /* Constant shifts. */
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uint32_t shift = (uint32_t)IR(ir->op2)->i;
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IRIns *irr = IR(ir->op2);
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uint32_t shift = (uint32_t)(LJ_32 || irr->o == IR_KINT) ? (uint32_t)irr->i : (uint32_t)ir_kint64(irr)->u64;
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if (LJ_64 && irt_is64(ir->t)) mik |= (shift & 32) ? MIPSI_D32 : MIPSI_D;
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emit_dta(as, mik, dest, ra_hintalloc(as, ir->op1, dest, RSET_GPR),
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(shift & 31));
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@ -2318,9 +2318,10 @@ static void asm_bitshift(ASMState *as, IRIns *ir, x86Shift xs, x86Op xv)
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IRIns *irr = IR(rref);
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Reg dest;
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if (irref_isk(rref)) { /* Constant shifts. */
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int shift;
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int32_t shift;
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dest = ra_dest(as, ir, RSET_GPR);
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shift = irr->i & (irt_is64(ir->t) ? 63 : 31);
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shift = (LJ_32 || irr->o == IR_KINT) ? irr->i : (int32_t)ir_kint64(irr)->u64;
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shift &= (irt_is64(ir->t) ? 63 : 31);
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if (!xv && shift && (as->flags & JIT_F_BMI2)) {
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Reg left = asm_fuseloadm(as, ir->op1, RSET_GPR, irt_is64(ir->t));
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if (left != dest) { /* BMI2 rotate right by constant. */
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