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riscv(jit): add IR assembler

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gns 2026-08-11 20:36:09 +08:00
parent 0b716ac3d5
commit dd8f69c963
2 changed files with 2053 additions and 0 deletions
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4
src/lj_asm.c
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@ -231,6 +231,8 @@ static Reg rset_pickrandom(ASMState *as, RegSet rs)
#include "lj_emit_ppc.h"
#elif LJ_TARGET_MIPS
#include "lj_emit_mips.h"
#elif LJ_TARGET_RISCV64
#include "lj_emit_riscv.h"
#else
#error "Missing instruction emitter for target CPU"
#endif
@ -1717,6 +1719,8 @@ static void asm_loop(ASMState *as)
#include "lj_asm_ppc.h"
#elif LJ_TARGET_MIPS
#include "lj_asm_mips.h"
#elif LJ_TARGET_RISCV64
#include "lj_asm_riscv64.h"
#else
#error "Missing assembler for target CPU"
#endif

2049
src/lj_asm_riscv64.h Normal file
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