riscv(jit): add IR assembler
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@ -231,6 +231,8 @@ static Reg rset_pickrandom(ASMState *as, RegSet rs)
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#include "lj_emit_ppc.h"
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#elif LJ_TARGET_MIPS
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#include "lj_emit_mips.h"
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#elif LJ_TARGET_RISCV64
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#include "lj_emit_riscv.h"
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#else
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#error "Missing instruction emitter for target CPU"
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#endif
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@ -1717,6 +1719,8 @@ static void asm_loop(ASMState *as)
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#include "lj_asm_ppc.h"
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#elif LJ_TARGET_MIPS
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#include "lj_asm_mips.h"
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#elif LJ_TARGET_RISCV64
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#include "lj_asm_riscv64.h"
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#else
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#error "Missing assembler for target CPU"
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#endif
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2049
src/lj_asm_riscv64.h
Normal file
2049
src/lj_asm_riscv64.h
Normal file
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